The invention is located in the field of the manufacturing of heterostructures intended for applications in the field of electronics, optics or opto-electronics.
More specifically, it relates to a method for manufacturing such heterostructures, which comprises the steps for bonding a so-called “donor” substrate on a so-called “receiver” substrate and for transferring a layer from this donor substrate onto this receiver substrate.
The heterostructures of this type, obtained by known methods from the state of the art, have defects at the bonding interface and at the surface of the transferred layer.
Among this surface defects, are found non-transferred areas (NTAs), blisters, vacancies or voids.
These defects have various origins and notably poor quality of the bonding interface.
From the state of the art, methods are already known which have the purpose of improving the quality of this bonding. These are notably surface treatments with which any contamination may be removed before bonding. These customary techniques are compatible with the techniques for bonding wafers and allow most of the contaminants to be removed, without degrading the surface condition of the wafers.
Thus, a conventional treatment with a chemical bath known under the acronym RCA (Radio Corporation of America) consists of treating the faces of the wafers, successively with a first solution comprising a mixture of ammonium hydroxide (NH4OH), hydrogen peroxide (H2O2) and deionized water, and then with a second solution comprising a mixture of hydrochloric acid (HCl), hydrogen peroxide (H2O2) and of deionized water. Another technique customarily used consists of applying a solution of hydrogen peroxide and sulfuric acid, commonly called “CARO” or further “Piranha Clean”.
However these methods are not sufficient for obtaining a very good bond quality for all the heterostructures, notably when these are substrates of the Semiconductor-On-Insulator type, known under the acronym SeOI, substrates comprising a fine insulating oxide layer known under the acronym “UTBOX”, (Ultra Thin Buried Oxide) or substrates which do not contain any of them, such as for example heterostructures known to the person skilled in the art under the acronym DSB (Direct Silicon Bonding) which means direct bonding on silicon.
As a reminder, it is recalled hereafter that UTBOX substrates designate SOI (Silicon On Insulator) type substrates in which the buried oxide layer is of a thickness less than or equal to 50 nm (50 nanometers), or even less than 25 nm.
DSB substrates comprise an active layer of semiconducting material directly bonded onto a receiver substrate or onto a bulk substrate which is also semiconducting, without forming an intermediate layer.
Now it is known that the number of interface defects increases significantly in the case of fine buried insulating layers. This is in connection with the capacity possessed by the buried insulating layer of absorbing water and gases existing at the bond interface: the finer this insulating layer, the less it absorbs water and the more defects are formed.
Moreover it is known from the article of V. Beyer et al., “Dissociation of Si+ ion implanted and as-grown thin SiO2 layers during annealing in ultra-pure neutral ambient by emanation of SiO2”, Journal of Applied Physics 101, 053516 (2007), that treating a silicon oxide (SiO2) film deposited by epitaxy on a silicon substrate, by annealing at 1,150° C., in an oxygen-free argon atmosphere at ambient pressure leads to partial dissolution of the SiO2 film and to the appearance of holes in this film.
However, the author is absolutely neither interested in methods for bonding and transferring layers, nor in improving the quality of this bonding.
The article of R. H. Esser et al., “Directional diffusion and void formation at a Si (001) bonded wafer interface”, Journal of Applied Physics, Vol. 92, No. 4, Aug. 15, 2002, describes various experiments conducted on hydrophobic bonding at low temperature (400° C.) of two silicon wafers.
Tests were carried out by etching in one of the wafers to be bonded, either grids of non-opening trenches with a width of 150 μm and a depth of 2 μm over the whole length, or series of trenches aligned along the <110> direction and then by bonding it onto the other wafer and subjecting them to annealing at 400° C. for 16 hours.
The results showed disappearance of void type defects around the trenches, whereas this type of defects was visible after annealing at 400° C. on control wafers which did not include trenches.
However, with this type of trenches of very large dimensions, it is not possible to achieve a quality bond between two substrates and they cannot absolutely be applied in a layer transfer method, except by causing the occurrence of many defects or further reducing the strength of the bonding interface, the latter strength being in direct relationship with the existing contact surface area between the transferred layer and the substrate.
Further, the trenches are formed by lithography which makes the method long and difficult to carry out.
The object of the invention is to solve the aforementioned drawbacks of the state of the art and notably to provide a method with which the quality of a bonding interface may be improved in a method for manufacturing a heterostructure comprising a layer transfer step.
For this purpose, the invention relates to a method for manufacturing heterostructures for applications in the field of electronics, optics or opto-electronics.